Fluke MET/CAL Procedure ============================================================================= INSTRUMENT: Fluke 45: (6 month) CAL VER IEEE /5720,5725 DATE: 01-Oct-98 AUTHOR: Fluke Corporation REVISION: $Revision: 1.4 $ ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 39 NUMBER OF LINES: 309 CONFIGURATION: Fluke 5720A CONFIGURATION: Fluke 5725A ============================================================================= # # Note: the 6 months spec applies to the Volts DC function only. # All other functions use the 1 year spec. # # Source: # Fluke 45 Service manual (June 1989). # # Compatibility: # MET/CAL 5.1 or later # # Subprocedures: # Sub IEEE-488.2 Identification Query (*IDN?) IEEE # # Required Files: # None # # System Specifications: # TUR calculation is based on specification interval of the accuracy file. # The default 5720A accuracy file contains 90 day specs. # # Fluke makes no warranty, expressed or implied, as to the fitness # or suitability of this procedure in the customer's application. # # The 90 day specifications of the 5720A are used in TUR computations. # STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK- R Q N P F W 1.002 M5720 C2 1.003 HEAD EQUIPMENT SETUP 1.004 DISP [32] WARNING 1.004 DISP HIGH VOLTAGE is used or exposed during the performance 1.004 DISP of this calibration. DEATH ON CONTACT may result if 1.004 DISP personnel fail to observe safety precautions. 1.005 DISP Connect the UUT to an ac power source. 1.005 DISP Turn the UUT on. 1.005 DISP Warm-up time: 1 hour. 1.005 DISP Ambient temperature: 18C - 28C. 1.005 DISP Relative humidity: less than 70% MOhm range only. 1.005 DISP less than 90% all other functions and ranges. 1.006 DISP Connect the UUT to IEEE-488 Port 1. 1.007 DISP Verify that the Fluke 45 is IEEE-488 control mode: 1.007 DISP Press 2ND, then press RATE. 1.007 DISP Use the up or down key to select IEEE. 1.007 DISP Press 2ND, then press MN MX. 1.007 DISP The IEEE-488 address will be shown. Make sure it is 1.007 DISP not set to zero. If necessary, use the up arrow key 1.007 DISP to select any other address. Press AUTO. 1.008 CALL Sub IEEE-488.2 Identification Query (*IDN?) IEEE 1.010 TARGET 1.011 MATH M[1] = 0 1.012 IEEE *TST? # Wait 10s before attempting to read self-test response. 1.013 LABEL SELF_TEST 1.014 HEAD PERFORMING SELF TEST.[D500] 1.015 HEAD PERFORMING SELF TEST..[D500] 1.016 HEAD PERFORMING SELF TEST...[D500] 1.017 HEAD PERFORMING SELF TEST....[D500] 1.018 MATH M[1] = M[1] + 2 1.019 JMPL SELF_TEST M[1] < 10 1.020 IEEE [I] 1.021 EVAL -e MEM == 0 : Self Test 2.001 JMP 39.002 FAIL 2.002 DISP *************************************************** 2.002 DISP To reduce noise pickup by test leads, particularly 2.002 DISP during high Ohms verification, use shielded test 2.002 DISP cables between the Fluke 5720A and Fluke 45. 2.002 DISP *************************************************** 2.003 DISP Connect the 5720A and the UUT as follows. 2.003 DISP [32] 5720A OUTPUT HI to UUT V Ohm Diode 2.003 DISP [32] 5720A OUTPUT LO to UUT COM 2.003 DISP [32] 5720A SENSE HI to UUT V Ohm Diode 2.003 DISP [32] 5720A SENSE LO to UUT COM 2.003 DISP [32] 5720A AUX CURRENT OUTPUT HI to UUT 100mA 2.003 DISP [32] 5720A GUARD (using shields) to UUT COM 2.004 DISP Add the following connections: 2.004 DISP [32] 5725A CURRENT OUTPUT HI to UUT 10A 2.004 DISP [32] 5725A CURRENT OUTPUT LO to UUT COM 2.005 HEAD {DIRECT VOLTAGE PERFORMANCE VERIFICATION} 2.006 IEEE VDC;RATE S;RANGE 1 2.007 5720 0.000mV S 2W 2.008 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 2.009 MATH MEM = MEM * 1000 2.010 MEME 2.011 MEMC 100 mV 0.006U 3.001 IEEE VDC;RATE S;RANGE 1 3.002 5720 90.000mV S 2W 3.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 3.004 MATH MEM = MEM * 1000 3.005 MEME 3.006 MEMC 100 mV 0.024U 4.001 IEEE VDC;RATE S;RANGE 2 4.002 5720 900.00mV S 2W 4.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 4.004 MATH MEM = MEM * 1000 4.005 MEME 4.006 MEMC 1000 mV 0.24U 5.001 IEEE VDC;RATE M;RANGE 1 5.002 5720 0.00mV S 2W 5.003 IEEE *TRG;VAL1?[I][D2000]*TRG;VAL1?[I] 5.004 MATH MEM = MEM * 1000 5.005 MEME 5.006 MEMC 300 mV 0.02U 6.001 IEEE VDC;RATE M;RANGE 1 6.002 5720 300.00mV S 2W 6.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 6.004 MATH MEM = MEM * 1000 6.005 MEME 6.006 MEMC 300 mV 0.08U 7.001 IEEE VDC;RANGE 2 7.002 5720 3.0000V S 2W 7.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 7.004 MEME 7.005 MEMC 3 V 0.0008U 8.001 5720 -3.0000V S 2W 8.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 8.003 MEME 8.004 MEMC 3 V 0.0008U 9.001 IEEE VDC;RANGE 3 9.002 5720 30.000V S 2W 9.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 9.004 MEME 9.005 MEMC 30 V 0.008U 10.001 IEEE VDC;RANGE 4 10.002 5720 300.00V S 2W 10.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 10.004 MEME 10.005 MEMC 300 V 0.08U 11.001 IEEE VDC;RANGE 5 11.002 5720 1000.0V S 2W 11.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 11.004 MEME 11.005 MEMC 1000 V 0.4U 12.001 5720 * S 12.002 ASK- U 12.003 ASK- U # Diode test PASS/FAIL performance not critical. T.U.R. not applicable. 12.004 HEAD {DIODE TEST PERFORMANCE VERIFICATION: Short} 12.005 IEEE DIODE;RATE M 12.006 5720 0.0000Z S CW 12.007 IEEE *TRG;VAL1?[I] 12.008 MEME 12.009 MEMC V 0.0008U 13.001 HEAD {DIODE TEST PERFORMANCE VERIFICATION: Open Circuit} 13.002 5720 * S 13.003 IEEE *TRG;VAL1?[I] # 45 sends "+1E+9" when front panel indicates "OL". 13.004 MATH MEM1 = +1E+9 13.005 MEME 13.006 MEMC Z 1U 14.001 ASK+ U 14.002 HEAD {ALTERNATING VOLTAGE PERFORMANCE VERIFICATION} 14.003 IEEE VAC;RATE M;RANGE 1 14.004 5720 0.00mV O S 2W 14.005 IEEE *TRG;VAL1?[I][D10000]*TRG;VAL1?[I] 14.006 MATH MEM = MEM * 1000 14.007 MEME 14.008 MEMC 300 mV 0.75U 15.001 5720 15.00mV 1kH O S 2W 15.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 15.003 MATH MEM = MEM * 1000 15.004 MEME 15.005 MEMC 300 mV 0.13U 1kH 16.001 5720 15.00mV 100kH O S 2W 16.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 16.003 MATH MEM = MEM * 1000 16.004 MEME 16.005 MEMC 300 mV 1.25U 100kH 17.001 5720 300.00mV 1kH S 2W 17.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 17.003 MATH MEM = MEM * 1000 17.004 MEME 17.005 MEMC 300 mV 0.70U 1kH 18.001 5720 300.00mV 100kH S 2W 18.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 18.003 MATH MEM = MEM * 1000 18.004 MEME 18.005 MEMC 300 mV 15.50U 100kH 19.001 IEEE VAC;RANGE 2 19.002 5720 3.0000V 1kH S 2W 19.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 19.004 MEME 19.005 MEMC 3 V 0.0070U 1kH 20.001 IEEE VAC;RANGE 3 20.002 5720 30.000V 1kH S 2W 20.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 20.004 MEME 20.005 MEMC 30 V 0.070U 1kH 21.001 IEEE VAC;RANGE 4 21.002 5720 300.00V 1kH S 2W 21.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 21.004 MEME 21.005 MEMC 300 V 0.70U 1kH 22.001 IEEE VAC;RANGE 5 22.002 5720 750.0V 1kH S 2W 22.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 22.004 MEME 22.005 MEMC 750 V 2.5U 1kH 23.001 HEAD {RESISTANCE PERFORMANCE VERIFICATION} 23.002 IEEE OHMS;RATE M;RANGE 1 23.003 5720 0.00Z S CW 23.004 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 23.005 MEME 23.006 MEMC 300 Z 0.04U 24.001 5720 190.00Z S CW 24.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 24.003 MEME 24.004 MEMC 300 Z 0.14U 25.001 IEEE OHMS;RATE M;RANGE 2 25.002 5720 0.0000kZ S CW 25.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 25.004 MATH MEM = MEM / 1000 25.005 MEME 25.006 MEMC 3 KZ 0.0002U 26.001 5720 1.9000kZ S CW 26.002 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 26.003 MATH MEM = MEM / 1000 26.004 MEME 26.005 MEMC 3 KZ 0.0012U 27.001 IEEE OHMS;RATE M;RANGE 3 27.002 5720 19.000kZ S CW 27.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 27.004 MATH MEM = MEM / 1000 27.005 MEME 27.006 MEMC 30 KZ 0.012U 28.001 IEEE OHMS;RATE M;RANGE 4 28.002 5720 190.00kZ S 2W 28.003 IEEE [D1000]*TRG;VAL1?[I]*TRG;VAL1?[I] 28.004 MATH MEM = MEM / 1000 28.005 MEME 28.006 MEMC 300 KZ 0.12U 29.001 IEEE OHMS;RATE M;RANGE 5 29.002 5720 1.9000MZ S 2W 29.003 IEEE [D2000]*TRG;VAL1?[I]*TRG;VAL1?[I] 29.004 MATH MEM = MEM / 1000000 29.005 MEME 29.006 MEMC 3 MZ 0.0013U 30.001 IEEE OHMS;RATE M;RANGE 6 30.002 5720 19.000MZ S 2W 30.003 IEEE [D5000]*TRG;VAL1?[I]*TRG;VAL1?[I] 30.004 MATH MEM = MEM / 1000000 30.005 MEME 30.006 MEMC 30 MZ 0.051U 31.001 IEEE OHMS;RATE M;RANGE 7 31.002 5720 100.0MZ S 2W 31.003 IEEE [D10000]*TRG;VAL1?[I]*TRG;VAL1?[I] 31.004 MATH MEM = MEM / 1000000 31.005 MEME 31.006 MEMC 300 MZ 2.0U 32.001 HEAD {FREQUENCY PERFORMANCE VERIFICATION} 32.002 IEEE FREQ;RATE M;RANGE 2 32.003 5720 9.000kH 1V S 2W 32.004 IEEE *TRG;VAL1?;[I$]*TRG;VAL1?[I] 32.005 MATH MEM = MEM / 1000 32.006 MEME 32.007 MEMC 10 KH 0.006U 1V 33.001 HEAD {LOW CURRENT PERFORMANCE VERIFICATION} 33.002 M5720 C2 33.003 IEEE ADC;RATE M;RANGE 1 33.004 5720 30.000mA S 2W 33.005 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 33.006 MATH MEM = MEM * 1000 33.007 MEME 33.008 MEMC 30 mA 0.018U 34.001 IEEE ADC;RATE M;RANGE 2 34.002 5720 100.00mA S 2W 34.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 34.004 MATH MEM = MEM * 1000 34.005 MEME 34.006 MEMC 100 mA 0.07U 35.001 IEEE AAC;RATE M;RANGE 1 35.002 5720 30.000mA 1kH S 2W 35.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 35.004 MATH MEM = MEM * 1000 35.005 MEME 35.006 MEMC 30 mA 0.160U 1KH 36.001 IEEE AAC;RATE M;RANGE 2 36.002 5720 100.00mA 1kH S 2W 36.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 36.004 MATH MEM = MEM * 1000 36.005 MEME 36.006 MEMC 100 mA 0.60U 1kH 37.001 5720 * S 37.002 HEAD {HIGH CURRENT PERFORMANCE VERIFICATION} 37.003 IEEE ADC;RATE M;RANGE 3 37.004 5720 10.000A B1 S 2W 37.005 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 37.006 MEME 37.007 MEMC 10 A 0.025U 38.001 IEEE AAC;RATE M;RANGE 3 38.002 5720 10.000A 1kH B1 S 2W 38.003 IEEE *TRG;VAL1?[I]*TRG;VAL1?[I] 38.004 MEME 38.005 MEMC 10 A 0.110U 1kH 39.001 5720 * S 39.002 IEEE *RST[D5000]LOCS 39.003 END